Designing Semiconductor Solutions for Automotive Embedded Control Systems
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Products

AIEC's products are custom crafted Application Specific Integrated Circuts (ASICs) and System on Chips (SoCs) designed to the exacting requirements of its customers. These products are developed to provide the highest level of performance at a reduced cost over that of standard products, which are typically designed as general purpose as possible to cover a broad application base. The following products are part of AIEC's custom ASIC and SoC design methodology, which relies heavily on Intellectual Property (IP) reuse for rapidly developing custom integrated circuits. AIEC's IP is also available for licensing, please contact us for further information.

Microprocessor Cores

AIEC develops microprocessor cores and uses third party microprocessor cores as part of custom SoC design. The microprocessor cores are integrated with AIEC's and/or 3rd party peripherals to form automotive specific System on Chips (SoCs). AIEC can integrate a full range of microprocessor cores for custom SoC designs including low cost 8-bit cores through high-performance 32-bit RISC cores running at 100’s of MHz. Please follow the link below for a listing of AIEC's and third party microprocessor cores.

Microprocessor Peripherals

AIEC's microprocessor peripherals are combined together to form a modular library of components. These library components can be integrated together as part of an Application Specific Integrated Circuit (ASIC), or they can be integrated together with a microprocessor core and associated memory as part of a complete System On Chip (SoC). Please follow the link below for a listing of AIEC's and third party microprocessor peripherals.

System On Chip (SoC) Development Platforms

AIEC provides its own SoC development platforms as well as third party systems for the prototype design and development of production intent custom SoCs. The development platforms contain a microprocessor core that is connected to an FPGA where a customized peripheral set can be implemented. This allows system level partitioning or co-design of the software and hardware such that the optimum balance between performance and cost can be achieved. Please follow the link below for a listing of AIEC's and third party SoC Development Platforms.